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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTE30N50E/D Advance Information ISOTOPTM TMOS E-FET.TM Power Field Effect Transistor N-Channel Enhancement-Mode Silicon Gate This advanced TMOS E-FET is designed to withstand high energy in the avalanche mode and switch efficiently. This new energy design also offers a drain-to-source diode with fast recovery time. Designed for high voltage, high speed switching applications in power supplies, PWM motor controls, and other inductive loads. The avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. * 2500 V RMS Isolated ISOTOP Package * Avalanche Energy Specified * Source-to-Drain Diode Recovery Time Comparable to a Discrete Fast Recovery Diode * Diode is Characterized for Use in Bridge Circuits * Very Low Internal Parasitic Inductance * IDSS and VDS(on) Specified at Elevated Temperature * U.L. Recognized, File #E69369 D MTE30N50E Motorola Preferred Device TMOS POWER FET 30 AMPERES 500 VOLTS RDS(on) = 0.150 OHM (R) 4 1 2 3 G SOT-227B S 1. 2. 3. 4. Source Gate Drain Source 2 MAXIMUM RATINGS (TC = 25C unless otherwise noted) Rating Drain-to-Source Voltage Drain-to-Gate Voltage (RGS = 1.0 M) Gate-to-Source Voltage -- Continuous -- Non-Repetitive (tp 10 ms) Drain Current -- Continuous @ 25C Drain Current -- Continuous @ 100C Drain Current -- Single Pulse (tp 10 s) Total Power Dissipation @ 25C Derate above 25C Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 100 Vdc, VGS = 10 Vdc, Peak IL= 30 Apk, L = 10 mH, RG = 25 ) Thermal Resistance -- Junction to Case Thermal Resistance -- Junction to Ambient Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds E-FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. ISOTOP is a trademark of SGS-THOMSON Microelectronics. Symbol VDSS VDGR VGS VGSM ID ID IDM PD TJ, Tstg EAS 3000 RJC RJA TL 0.5 62.5 260 C/W C Value 500 500 20 40 30 12 80 250 2.0 - 55 to 150 Unit Vdc Vdc Vdc Vpk Adc Apk Watts W/C C mJ This document contains information on a new product. Specifications and information herein are subject to change without notice. Preferred devices are Motorola recommended choices for future use and best overall value. (c)Motorola TMOS Power MOSFET Transistor Device Data Motorola, Inc. 1996 1 MTE30N50E ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 0.25 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 500 Vdc, VGS = 0 Vdc) (VDS = 500 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0) ON CHARACTERISTICS (1) Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (VGS = 10 Vdc, ID = 15 Adc) Drain-to-Source On-Voltage (VGS = 10 Vdc, ID = 30 Adc) (VGS = 10 Vdc, ID = 15 Adc) Forward Transconductance (VDS = 15 Vdc, ID = 15 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (see figure 8) (VDS = 400 Vdc, ID = 30 Adc, VGS = 10 Vdc) (VDD = 250 Vdc, ID = 30 Adc, VGS = 10 Vdc, RG = 4.7 ) td(on) tr td(off) tf QT Q1 Q2 Q3 SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (IS = 30 Adc, VGS = 0 Vdc) (IS = 30 Adc, VGS = 0 Vdc, TJ = 125C) VSD -- -- trr (IS = 30 Adc, VGS = 0 Vdc, dIS/dt = 100 A/s) Reverse Recovery Stored Charge INTERNAL PACKAGE INDUCTANCE Internal Drain Inductance Internal Source Inductance (1) Pulse Test: Pulse Width 300 s, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperature. LD LS -- -- 5.0 5.0 -- -- nH nH ta tb QRR -- -- -- -- 0.95 0.88 485 312 173 8.2 1.2 -- -- -- -- -- C ns Vdc -- -- -- -- -- -- -- -- 32 105 160 115 235 35 110 65 60 175 275 200 350 -- -- -- nC ns (VDS = 25 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss Coss Crss -- -- -- 7200 775 120 10080 1200 250 pF VGS(th) 2.0 -- RDS(on) VDS(on) -- -- gFS 17 4.1 -- -- 5.0 7.0 -- mhos -- 3.2 7.0 0.13 4.0 -- 0.15 Vdc mV/C Ohms Vdc V(BR)DSS 500 -- IDSS -- -- IGSS -- -- -- -- 10 200 100 nAdc 560 566 -- -- Vdc mV/C Adc Symbol Min Typ Max Unit Reverse Recovery Time 2 Motorola TMOS Power MOSFET Transistor Device Data MTE30N50E TYPICAL ELECTRICAL CHARACTERISTICS 60 TJ = 25C I D , DRAIN CURRENT (AMPS) 50 40 30 20 10 4V 0 0 4 8 2 6 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 12 0 2 2.5 6V VGS = 10 V 8V I D , DRAIN CURRENT (AMPS) 60 50 40 30 20 10 100C 25C TJ = - 55C 3 4 3.5 4.5 5.5 5 6 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 6.5 7 VDS 10 V 5V Figure 1. On-Region Characteristics RDS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS) RDS(on) , DRAIN-TO-SOURCE RESISTANCE (OHMS) Figure 2. Transfer Characteristics 0.35 VGS = 10 V 0.3 TJ = 100C 0.25 0.2 0.15 0.1 0.5 0 0 10 20 30 40 ID, DRAIN CURRENT (AMPS) 50 60 25C 0.17 TJ = 25C 0.16 0.15 VGS = 10 V 0.14 15 V 0.13 - 55C 0.12 0 10 20 30 40 ID, DRAIN CURRENT (AMPS) 50 60 Figure 3. On-Resistance versus Drain Current and Temperature Figure 4. On-Resistance versus Drain Current and Gate Voltage RDS(on) , DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.5 VGS = 10 V ID = 15 A 2 10000 VGS = 0 V 1000 TJ = 125C 100C 1.5 I DSS, LEAKAGE (nA) 100 25C 10 1 0.5 0 - 50 - 25 25 75 0 50 100 TJ, JUNCTION TEMPERATURE (C) 125 150 1 0 100 200 300 400 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 500 Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-To-Source Leakage Current versus Voltage Motorola TMOS Power MOSFET Transistor Device Data 3 MTE30N50E POWER MOSFET SWITCHING Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge controlled. The lengths of various switching intervals (t) are determined by how fast the FET input capacitance can be charged by current from the generator. The published capacitance data is difficult to use for calculating rise and fall because drain-gate capacitance varies greatly with applied voltage. Accordingly, gate charge data is used. In most cases, a satisfactory estimate of average input current (IG(AV)) can be made from a rudimentary analysis of the drive circuit so that t = Q/IG(AV) During the rise and fall time interval when switching a resistive load, VGS remains virtually constant at a level known as the plateau voltage, VSGP. Therefore, rise and fall times may be approximated by the following: tr = Q2 x RG/(VGG - VGSP) tf = Q2 x RG/VGSP where VGG = the gate drive voltage, which varies from zero to VGG RG = the gate drive resistance and Q2 and VGSP are read from the gate charge curve. During the turn-on and turn-off delay times, gate current is not constant. The simplest calculation uses appropriate values from the capacitance curves in a standard equation for voltage change in an RC network. The equations are: td(on) = RG Ciss In [VGG/(VGG - VGSP)] td(off) = RG Ciss In (VGG/VGSP) The capacitance (Ciss) is read from the capacitance curve at a voltage corresponding to the off-state condition when calculating td(on) and is read at a voltage corresponding to the on-state when calculating td(off). At high switching speeds, parasitic circuit elements complicate the analysis. The inductance of the MOSFET source lead, inside the package and in the circuit wiring which is common to both the drain and gate current paths, produces a voltage at the source which reduces the gate drive current. The voltage is determined by Ldi/dt, but since di/dt is a function of drain current, the mathematical solution is complex. The MOSFET output capacitance also complicates the mathematics. And finally, MOSFETs have finite internal gate resistance which effectively adds to the resistance of the driving source, but the internal resistance is difficult to measure and, consequently, is not specified. The resistive switching time variation versus gate resistance (Figure 9) shows how typical switching performance is affected by the parasitic circuit elements. If the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. The circuit used to obtain the data is constructed to minimize common inductance in the drain and gate circuit loops and is believed readily achievable with board mounted components. Most power electronic loads are inductive; the data in the figure is taken with a resistive load, which approximates an optimally snubbed inductive load. Power MOSFETs may be safely operated into an inductive load; however, snubbing reduces switching losses. 24000 VDS = 0 V 20000 C, CAPACITANCE (pF) 16000 12000 8000 4000 0 10 Crss 5 VGS 0 VDS 5 10 15 20 25 Coss Crss Ciss C, CAPACITANCE (pF) VGS = 0 V TJ = 25C 100000 VGS = 0 V 10000 Ciss TJ = 25C 1000 Coss Ciss 100 Crss 10 10 100 1000 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation Figure 7b. High Voltage Capacitance Variation 4 Motorola TMOS Power MOSFET Transistor Device Data MTE30N50E VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 12 10 8 6 4 2 0 Q3 0 50 VDS 100 150 Qg, TOTAL GATE CHARGE (nC) 200 ID = 30 A TJ = 25C Q1 Q2 QT 600 500 VGS 400 300 200 100 0 250 10000 VDS , DRAIN-TO-SOURCE VOLTAGE (VOLTS) VDD = 250 V ID = 30 A VGS = 10 V TJ = 25C t, TIME (ns) 1000 100 td(off) tf tr td(on) 10 1 10 RG, GATE RESISTANCE (OHMS) 100 Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge Figure 9. Resistive Switching Time Variation versus Gate Resistance SAFE OPERATING AREA The Forward Biased Safe Operating Area curves define the maximum simultaneous drain-to-source voltage and drain current that a transistor can handle safely when it is forward biased. Curves are based upon maximum peak junction temperature and a case temperature (TC) of 25C. Peak repetitive pulsed power limits are determined by using the thermal response data in conjunction with the procedures discussed in AN569, "Transient Thermal Resistance-General Data and Its Use." Switching between the off-state and the on-state may traverse any load line provided neither rated peak current (IDM) nor rated voltage (VDSS) is exceeded and the transition time (tr,tf) do not exceed 10 s. In addition the total power averaged over a complete switching cycle must not exceed (TJ(MAX) - TC)/(RJC). A Power MOSFET designated E-FET can be safely used in switching circuits with unclamped inductive loads. For reliable operation, the stored energy from circuit inductance dissipated in the transistor while in avalanche must be less than the rated limit and adjusted for operating conditions differing from those specified. Although industry practice is to rate in terms of energy, avalanche energy capability is not a constant. The energy rating decreases non-linearly with an increase of peak current in avalanche and peak junction temperature. 9 8 QRR, STORED CHARGE ( C) 7 6 5 4 3 2 dlS/dt = 100 A/s VDD = 50 V TJ = 25C 30 VGS = 0 V TJ = 25C 20 I S , SOURCE CURRENT (AMPS) 10 0 6 12 18 24 30 0 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 IS, SOURCE CURRENT (AMPS) VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 10. Stored Charge Figure 11. Diode Forward Voltage versus Current Motorola TMOS Power MOSFET Transistor Device Data 5 MTE30N50E SAFE OPERATING AREA VGS = 20 V SINGLE PULSE TC = 25C 10 100 s 1 ms 10 ms dc 1 RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 0.1 10 1 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 1000 10 s EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 100 I D , DRAIN CURRENT (AMPS) 3000 ID = 30 A 2500 2000 1500 1000 500 0 25 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (C) 150 Figure 12. Maximum Rated Forward Biased Safe Operating Area Figure 13. Maximum Avalanche Energy versus Starting Junction Temperature r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 1.0E-05 1.0E-04 1.0E-03 1.0E-02 t, TIME (s) 1.0E-01 1.0E+00 1.0E+01 Figure 14. Thermal Response di/dt IS trr ta tb TIME tp IS 0.25 IS Figure 15. Diode Reverse Recovery Waveform 6 Motorola TMOS Power MOSFET Transistor Device Data MTE30N50E PACKAGE DIMENSIONS A B C H L R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS. MILLIMETERS MIN MAX 31.50 31.70 7.80 8.20 4.10 4.30 14.90 15.10 30.10 30.30 38.00 38.20 4.00 11.80 12.20 8.90 9.10 12.60 12.80 25.20 25.40 1.95 2.05 4.10 0.75 0.85 5.50 INCHES MIN MAX 1.240 1.248 0.307 0.322 0.161 0.169 0.586 0.590 1.185 1.193 1.496 1.503 0.157 0.464 0.480 0.350 0.358 0.496 0.503 0.992 1.000 0.076 0.080 0.157 0.030 0.033 0.217 Q G 4 1 3 2 MN D E F Recommended screw torque: 1.3" 0.2 Nm Maximum screw torque: 1.5 Nm P S STYLE 1: PIN 1. 2. 3. 4. DIM A B C D E F G H L M N P Q R S SOURCE GATE DRAIN SOURCE 2 SOT-227B Motorola TMOS Power MOSFET Transistor Device Data 7 MTE30N50E Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE (602) 244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, Toshikatsu Otsuki, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-3521-8315 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 8 Motorola TMOS Power MOSFET Transistor Device Data MTE30N50E/D *MTE30N50E/D* |
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